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Unified Parallel Lattice Structures for Time-Recursive Discrete Cosine/Sine/Hartley Transforms

机译:时间递归离散余弦/正弦/哈特利变换的统一并行晶格结构

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摘要

The problems of unified efficient computations of the discrete cosine transform (DCT), discrete sine transform (DST), discrete Hartley transform (DHT), and their inverse transforms are considered. In particular, a new scheme employing the time- recursive approach to compute these transforms is presented. Using such approach, unified parallel lattice structures that can dually generate the DCT and DST simultaneously as well as the DHT are developed. These structures can obtain the transformed data for sequential input time recursively and the total number of multipliers required is a linear function of the transform size N. Furthermore, there is no any constraint on N. The resulting architectures are regular, module, and without global communication so that it is very suitable for VLSI implementation for high-speed applications such as ISDN network and HDTV system. It is also shown in this paper that the DCT, DST, DHT and their inverse transforms share an almost identical lattice structure. The lattice structures can also be formulated into pre-lattice and post-lattice realizations. Two methods, the SISO and double- lattice approaches, are developed to reduce the number of multipliers in the parallel lattice structure by 2N and N respectively. The trade-off between time and area for the block data processing is also considered.
机译:考虑了离散余弦变换(DCT),离散正弦变换(DST),离散Hartley变换(DHT)及其逆变换的统一有效计算问题。特别是,提出了一种采用时间递归方法来计算这些变换的新方案。使用这样的方法,开发了可以同时双重生成DCT和DST以及DHT的统一的平行晶格结构。这些结构可以递归地获取顺序输入时间的变换数据,并且所需乘数的总数是变换大小N的线性函数。此外,对N没有任何约束。生成的体系结构是规则的,模块的,并且没有全局通讯,因此非常适合用于ISDN网络和HDTV系统等高速应用的VLSI实现。本文还表明,DCT,DST,DHT及其逆变换共享几乎相同的晶格结构。晶格结构也可以表述为晶格前和晶格后的实现。开发了两种方法,即SISO和双晶格方法,可将平行晶格结构中的乘法器数量分别减少2N和N。还考虑了块数据处理的时间和面积之间的权衡。

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